July 30, 2018
IP supplier FotoNation has decided to embrace the use of high-level synthesis in the creation of cores for smartphones and other high-integration, low-power systems.
May 11, 2015
Altera is revamping the Quartus II software for its FPGAs with a mapping and synthesis engine aimed at the upcoming Gen 10 products, as well as adding a C/C++ front-end for system-level design.
February 25, 2015
Ascent Lint adds checks for DO-254, tighter integration with HDL Coder, more SystemVerilog support and new VHDL and Verilog rules in March update.
February 25, 2015
Cadence Design Systems has tied together the Forte Synthesiser and the internally developed C-to-Silicon tools into a new high-level synthesis (HLS) environment the company has titled Stratus.
January 5, 2015
SystemC coding style can lead to excessive congestion in the logic generated by high-level synthesis. Cadence described how it is attacking the issue at its recent Front-End Design Summit.
May 24, 2014
More lint rules, better SystemVerilog support, links to MATLAB and Simulink
February 6, 2014
EDA giant cites high-level synthesis' move into the mainstream as driven by IP integration challenges in striking deal for the HLS market leader.
May 29, 2012
Calypto has combined the Catapult high-level synthesis (HLS) tool with elements of its PowerPro software to focus on the demand for lower-power SoC designs.