Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
February 23, 2016

Directed self assembly may offer similar benefits to EUV, process modeling study says

Directed self assembly techniques may offer similar benefits to EUV lithography, especially for DRAM makers, says SPIE conference paper

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February 23, 2016

ARM aims at low-end compute with 32bit Cortex-A

ARM has gone back to the 32bit realm for its latest Cortex-A processor core, aiming the device at a new generation of low-cost platforms inspired by the success of the Raspberry Pi as well as wearables.

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February 22, 2016

DVCon United States 2016 preview: Real Intent

Verification specialist’s DVCon activities are headlined by a panel on emulation and static verification.

February 22, 2016

DVCon United States 2016 preview: Mentor Graphics

Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.

February 18, 2016

ARM, Ceva aim at multi-carrier modems

ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.

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February 11, 2016

SPIE Advanced Lithography Preview: Mentor Graphics

The Calibre vendor will have a strong technical presence at the leading lithography conference taking place in late February in San Jose.

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February 2, 2016

Cadence boosts compression with physical DFT tool

Cadence has use physically aware placement in a test tool that promises less routing congestion for scan test and which increases the potential for stimulus compression.

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January 26, 2016

OpenAMP brings control to multicore SoCs

The Multicore Association has started work on standardizing a set of APIs that aim to simplify communications between processors in heterogeneous multicore SoCs

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January 20, 2016

Catching complex CDC bugs in large SoCs

A look at techniques to trap complex errors caused by signals crossing clock, reset and power domains is the focus of this upcoming webinar

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January 14, 2016

DesignCon 2016 preview: Mentor Graphics

HyperLynx leads the way for vendor at DesignCon with booth demos and a day-long modeling and analysis seminar.

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