TSMC: e-beam winning on cost over EUV for lithography
EUV may be getting most R&D cash but the world’s biggest foundry says e-beam currently has the edge on defects and double patterning.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
Intel pins its IoT hopes on standards and data-center analytics
Intel aims to use a dual-pronged strategy that takes advantage of internet of things applications to push the x86 back into embedded-systems designs.
Foxconn’s wishlist for wearables and the Internet of Things
Manufacturing giant says we need a new category of WPUs – wearables processing units – to create a mass market and that ARM needs to go smaller than the MO.
DVCon Europe focuses on systems design and verification
Focus on systemic issues matches DVCon Europe event to European interests
IoT mixed signal design: keep everything in the green
ARM and Cadence have teamed up to show how system-level and implementation-level representations of a mixed-signal design can be linked together and kept in sync as the project progresses.
Mentor joins European power electronics consortium
Will help industry giants develop more reliable power electronics systems for applications including transport and power generation.
ARM explores multithreaded core as alternative to GPU computing
ARM is working on a heavily multithreaded version of its processor core to see if it can provide a more convenient alternative to GPUs.
Simulations point to better performance for Intel 14nm finFET
Gold Standard Simulations has run simulations to work out how much of an improvement Intel’s new rectangular shape represents.
Power and clocking at 20nm force changes in FPGAs
Design for the 20nm generation of processes has revealed power and clocking issues for the two major FPGA manufacturers presentations at Hot Chips revealed.
Thermal limits challenge Hot Chips power pair
Two of the custom designs presented at the 26th Hot Chips in Cupertino exemplified the problems caused by increasing power density and the benefits of looking at heat removal at the system level.