Agile Analog has launched its own digital standard cell library, designed to be used in the control circuits for analog blocks that form the IP company’s main offering.
In contrast to regular foundry cells, the digital library is available in thick-oxide based cells, operating above the core voltage domain to minimize leakage, and is intended to allow easier migration of the combined mixed-signal circuit designs across different process nodes, down to FinFET technologies.
“The Agile DSCL has been developed to enable our customers to embed digital functionality within the analog domain. These digital cells will operate within the analog voltage domain which avoids excessive level shifting to the core domain and enables digital control to be tightly coupled to analog IP. The DSCL has been developed to be process agnostic and therefore is available in the same processes as our analog IP,” said Barry Paterson, Agile Analog’s CEO. “The library fully supports industry standard digital design methodologies by making all required views available. Our analog digital cell library is already being used successfully in customer designs to support low power, always-on solutions for applications such as IoT.”
The cell library contains options for channel length and various track heights to provide flexibility for designers. For specific design targets such as low-power designs, there is a specialized power-management library.