TSMC certifies Synopsys tool flow for 7nm EUV process
New flow enables high-performance, high-integration designs.
Product
Free formal verification primer offered by Synopsys
Free e-book offers an introduction to formal verification methods for those who may be curious about the technique, or who need to understand its advantages and limitations in order to manage its use effectively.
Control test point counts for ISO 26262
The automotive safety standard targets 90% in-system test coverage. VersaPoint technology helps to simplify reaching your target.
Leti releases photonics design kit for Synopsys PhoeniX OptoDesigner suite
PDK enables photonics prototyping on MPW runs and compatibility with volume production at STMicroelectronics at Crolles.
Synopsys UFS 3.0 IP doubles bandwidth to flash
Faster, lower power flash interface IP with built-in encryption/decryption speeds access to embedded and removable storage.
HyperLynx update automates SerDes validation
Simulation suite automates the largely manual process of validating more than 25 SerDes protocols.
Demand for better video, audio prompts HDMI 2.1 IP push
IP provides key building blocks for building better video and audio playback devices using HDMI 2.1
Synopsys integrates Helic’s EM tools to tighten margins on mixed-signal, analogue and RF SoCs
Better integration of EM modeling and analysis tools with Synopsys' Custom Compiler should enable tighter design margins
DAC 2017 preview: Baum
Start-up Baum is co-located with Verific at DAC 2017 and will demonstrate its soon-to-launch power analysis and modeling software.
Leverage AI and centralized processing for L-5 autonomous vehicles
L-5 autonomous vehicles need centralized raw data analysis with machine learning to cope with the demands of ASIL-D functional safety. Mentor's response is DRS360.