Blog Topics

finFETs are vital to the next generation of CMOS processes from Intel, TSMC and others. How will process issues including bulk vs SOI substrates, density limitations, thickness control, and planar device integration affect their practical implementation?

Cadence Design Systems has developed semiconductor IP for the automotive industry's OPEN Alliance to make ethernet the core networking backbone of future motor vehicles.

National Instruments wants to shift the focus for many embedded systems designers away from hardware cost optimization towards graphical programming as a way of reducing the time it takes to get targets up, running and productive.

Chip-design teams are running into problems with verification because they are focused too much on tools and not enough on processes, Mentor Graphics chief scientist Harry Foster explained today at the first of a series of Verification Futures seminars hosted by TVS in Europe this week.

Mentor's Stephen Pateras explains how the proposed IJTAG standard speeds IP test by replacing time-consuming custom and ad hoc methodologies.

The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.

Embedded hardware and software are experiencing exciting advances but free, open source technologies only go so far in connecting them. Help is on the way.

HAPS-70 boards launch with latest Xilinx chips, high-speed time-domain multiplexing and Synopsys' take on the debug crunch.

In a deal that pits the company head to head with ARM, Imagination Technologies has decided to buy the business of MIPS Technologies including the CPU architectures and cores. The price tag is $60m cash.

ARM is among the companies aiming to avoid a patent portfolio falling into the wrong hands after the break up of MIPS Technologies.