EDA

March 20, 2013

Accellera publishes SystemC-AMS 2.0 standard

Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.
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March 19, 2013

SoC prototyping ascends the learning curve

Leading vendors and users spoke of the challenges in developing today's SoCs when faced with a plethora of prototyping techniques - and the challenges that remain.
March 19, 2013

DATE: The legacy of Mead and Conway

What is the legacy of the most famous textbook in chip design: Carver Mead and Lynn Conway’s Introduction to VLSI Systems? Although some core assumptions were misses and the silicon compiler concept was outcompeted by other ideas, more than 30 years on it remains a key blueprint for IC design.
March 19, 2013

DATE: Dark clouds gather over 3D integration, panelist tells conference

The chip industry faces problems as foundries and the packaging industry compete over 3D technologies. If resolved, it could mean a new dawn in ASIC design.
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March 13, 2013

On the way to the system of systems

Experts from Cadence and Synopsys talk about the implications for designers of the rise of ‘systems of systems’.
March 12, 2013

EDA sets sail in a ‘sea of processors’

The purchase of Tensilica by Cadence Design Systems could prove the way that EDA and multicore-based system design come together.
March 11, 2013

Cadence to buy Tensilica

Cadence Design Systems has announced on the eve of CDNLive Silicon Valley that it has decided to buy configurable-processor company Tensilica for approximately $380m in cash.
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March 7, 2013

Tanner embraces OpenAccess

Tanner EDA has completed the port of its HiPer Silicon design suite to work with the OpenAccess database, providing better interoperability with foundry process design kits (PDKs) and with other vendors’ IC design tools as well as providing better support for multiple users accessing the same design.
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February 25, 2013

DVCon: UPF and CPF harmony in low power is only a foundation

As DVCon begins, we interview Cadence's Qi Wang, who has led its efforts to converge the Common Power Format with its rival as the IEEE1801 standard is revamped.
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February 21, 2013

ISSCC 2013: AMD constraints help tame Jaguar

Some conservative decisions were important parts of AMD's design strategy for the 28nm core that's just been specified in PlayStation 4
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