Siemens EDA

October 29, 2020

Implementing medical device security for optimal outcomes

Describing a security strategy that pulls on best practices and standards to ensure medical device approval and the best patient outcomes.
Expert Insight  |  Topics: Embedded - Architecture & Design, - Embedded Topics  |  Tags: , , , ,   |  Organizations:
October 26, 2020
Featured image - cel-name conflict resolution

Resolving IP cell-name conflicts peacefully

One roadblock to the integration of IP from multiple vendors into an SoC is the likelihood of finding duplicate cell names in the merged design. Carefully considered renaming strategies can fix the problem without causing design database bloat.
October 16, 2020
Dina Medhat - Mentor

Not using reliability check waivers? You’re wasting valuable time

Reliability rule checks need - and now get - more granular analysis that allows designers to adopt proposed waivers with much greater confidence.
Expert Insight  |  Topics: EDA - DFM  |  Tags: , , , , , ,   |  Organizations:
September 28, 2020
Jeff Hancock is a Senior Product Manager in the Embedded Platform Technology Business Unit of Mentor, A Siemens Business. He oversees the Nucleus and Mentor Embedded Hypervisor runtime product lines, as well as associated middleware and professional services.

How to choose between a hypervisor and a multicore framework

And when this key architectural decision might involve combining both depending on your design’s use-case and demands placed upon it.
September 24, 2020

How MBSE enables advanced E/E architecture design

Model-based systems engineering is a necessary next-step in methodology to cope with the broadening range of innovation across automotive, aerospace and other vehicular markets.
Article  |  Topics: Electrical Design  |  Tags: , , , ,   |  Organizations: ,
September 21, 2020
filler cells featim sep20

P&R filler cell insertion slowing you down? Replace it

A physical verification-ready flow can speed project delivery by making your use of filler cells more efficient.
Article  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , , , ,   |  Organizations:
September 7, 2020
Ashish Darbari is CEO of formal verification consultancy and training provider Axiomise.

Everything you ever wanted to know about RISC-V architectural formal verification

But you were NOT afraid to ask.... It's time for some answers.
August 27, 2020
total critical area feature - headline image

How to optimize test patterns based on critical area

The world of ATPG just changed with the introduction of a new way to create and choose the most effective test patterns.
Article  |  Topics: EDA - DFT  |  Tags: , , , ,   |  Organizations: ,
August 25, 2020
Hend Wagieh is the senior product manager for Calibre circuit verification at Mentor, a Siemens Business. Her responsibilities include defining the product roadmap, business strategies, and associated new use models needed to grow the product line and increase market competitiveness for the Calibre nmLVS platform. Hend holds a degree in Electronics and Communication Engineering from Ain Shams University in Cairo, Egypt.

Creating a new paradigm for circuit verification

How Calibre is evolving to address the challenges of LVS verification in early-stage design.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
August 14, 2020
John Ferguson is the product management director for Calibre DRC applications at Mentor, a Siemens BusinessHe holds a B.Sc. degree in Physics from McGill University, an M.Sc. in Applied Physics from the University of Massachusetts, and a Ph.D. in Electrical Engineering from the Oregon Graduate Institute of Science and Technology.

EDA innovation is the foundation of progress

For physical verification and beyond, each process node requires new thinking, new tools and greater performance.
Expert Insight  |  Topics: EDA - DFM, Verification  |  Tags: , , , , , , , ,   |  Organizations:

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