Joe Sawicki of Siemens EDA recently addressed the main trends in design delivery from architecture to validation to digital twins - and where they may soon take the industry and its products.
Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.
Altera uses standardized design flows to help integrate Intel foundry rules, cut time to tape-out - and speed the evolution of its design flows.
How to speed project start-up, boost designer productivity and increase schedule predictability using design management tools.
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