Part two of this feature describes three use-cases that exploit the VirtuaLAB technology in HDMI, PCIe and Ethernet designs.
This two-part article describes advantages when using a hardware emulation platform in virtual mode compared with in-circuit-emulation.
Portable Stimulus allows reuse along horizontal, vertical and technique axes, but you need to be aware of the strengths and weaknesses of each to get the greatest benefits.
CAA is a valuable tool available to both design engineers and foundries to help them avoid layout-dependent effects during manufacturing.
How Chips&Media used HLS on the development of a computer vision IP block.
The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
Automated voltage-aware DRC addresses the reliability verification challenges in today’s high-voltage and multiple power domain applications.
Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
Machine learning techniques help ensure the validity of Liberty Variation Format information for OCV analysis at lower process nodes.
This defect and fault injection primer looks at how to standardize definitions, decide injection volume, measure activity, manage simulation, optimize test time and more.
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