Siemens EDA

November 4, 2021
UPMEM-PIM-DRAM-featured-image

How UPMEM ensured effective power delivery for its processor-in-memory design

PIM memory boosts efficiency by operating on data without moving it to the CPU but realizing this type of novel technology posed power integration and planning challenges.
October 21, 2021
Sherif Hany Mousa is a Principal Technologist in the Calibre Design Solutions division of Siemens EDA, a part of Siemens Digital Industries Software. Sherif previously held positions as a technical marketing engineer, analog quality assurance engineer, and IC design consultant for physical verification and analog/mixed signal applications. He has authored multiple publications and holds multiple patents in the fields of analog layout porting, hotspot detection and correction, and machine learning-assisted verification flows. Sherif is a senior IEEE member who holds an M.Sc. in Electrical and Communication Engineering, and is currently engaged in Ph.D. research, focusing on circuit analysis.

Advanced symmetry verification is a thing of beauty

Innovation is extending the technique's power across areas such as context-aware layout, accounting for multi-patterning and implementing fill.
Expert Insight  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , , , ,   |  Organizations:
September 13, 2021
Swathi Rangarajan is a principal product engineer in the Calibre Design Solutions division of Siemens Digital Industries Software, supporting the Calibre RealTime platform. She focuses on in-design sign-off Calibre DRC checking in custom and digital design tools. Before joining Siemens, Swathi was an application engineer focusing on custom and digital design tool suites. Swathi received her BS in electronics and communication engineering from India, and her MS in engineering from San Jose State University

Hit your tapeout schedules with in-design signoff DRC

Delivering physical implementations at new process nodes is getting ever harder. Learn how to stay on track by checking work is rule-compliant as you go.
Expert Insight  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , , ,   |  Organizations:
September 3, 2021
Silicon Photonics - Verification - featim - sep21

Silicon photonics verification: Progress through adaptation

SiP promises advances in transmission speeds, bandwidth, accuracy and low power but verification requires careful evolution of existing tools.
July 20, 2021
Credit: laborotorio linux

Making sense of cloud EDA

How to carry out a sensible analysis of cloud EDA's potential, so you get the right tools and computational resources to deliver increasingly complex designs.
Article  |  Topics: EDA - DFM  |  Tags: , , , , ,   |  Organizations:
June 29, 2021
Shane Skinner is a Technical Marketing Engineer working on the Capital, VeSys, and Solid Edge Wiring and Harness Design product lines withom the Integrated Electrical Systems segment of Siemens Digital Industry Software. Shane previously worked for Mentor supporting its PCB design products, Xpedition and PADS. He graduated from Oregon State University with a Bachelor of Science in Electrical and Computer Engineering.

How ECAD-MCAD integration tackles the challenges of next-gen design

Creating strong links between the electrical and mechanical design domains is a leading enabler of digitalization.
Expert Insight  |  Topics: Electrical Design, Mechanical design  |  Tags: , , , , , ,   |  Organizations:
June 25, 2021
Tina Durgia is a Product Manager for AMS verification at Siemens EDA and is responsible for the Solido Characterization Suite. Tina holds a Master’s degree in Electrical Engineering from Santa Clara University and has more than 13 years of experience in EDA across various digital design products including static timing analysis, place and route, logic synthesis and power analysis.

Use machine learning and visualization to accelerate Liberty file verification

Learn how to bring together your NLDM and CCS models to reach timing closure faster with Solido Analytics.
June 21, 2021
LEF abstract vs GDS

Out-of-sync data issues in parallel design flows need automated design integrity checks

Overcome problems created by mismatches between library exchange format (LEF) and GDS or OASIS representations to avoid design delays.
Article  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , , , , ,   |  Organizations:
May 31, 2021
Srinivas Velivala is a principal product manager with Calibre Design Solutions in Siemens EDA, a part of Siemens Digital Industries Software. His primary focus is the development of Calibre integration and interface tools and technologies. Before joining Siemens EDA, he designed high-density SRAM compilers. In addition to more than 12 years of design and product management experience, Srinivas holds a B.S. and M.S. in Electrical and Computer Engineering.

How you can decide what level of DRC you need when you need it

Using on-demand rule checks during place-and-route boosts efficiency and design quality.
May 28, 2021
Matthew Walsh is a Product Marketing Manager in the Electronic Board Systems division of Siemens Digital Industries Software, responsible for all cloud solutions. He has more than 25 years of experience in semiconductor and electronics marketing, sales, and application engineering. He earned his BSEE at the University of Massachusetts. Matt is an avid skier and science fiction geek.

May the Cloud be with you

How to unify your design team to defeat the dark side of board systems design.
Expert Insight  |  Topics: Digital Twin, PCB Topics, PCB - System Codesign  |  Tags: , ,   |  Organizations:

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