How you can decide what level of DRC you need when you need it
Using on-demand rule checks during place-and-route boosts efficiency and design quality.
Richard Goering System-on-chip designers who work with third-party silicon intellectual property (IP) will see some significant changes at 32nm and below. Physical IP will be highly optimized to specific processes, following intense collaborations between large IP providers and foundries. Processor IP may become less synthesizable and make more use of hard macros. On the plus […]
The IEEE Council for EDA has opened its website at www.c-eda.org. Earlier this fall, the IEEE Council for Electronic Design Automation (CEDA) took on formal existence with the election of its first officers. Design consultant and one time DAC general chair Alfred Dunlop is its launch president. He sets out why this is a great […]