May 3, 2021
Learn how power-intent, LDEs, ESD and voltage-aware spacing techniques can particularly benefit from the use of static verification checks.
November 27, 2019
A look at some of the key techniques needed to ensue good code coverage during the verification of low-power SoC designs.
December 3, 2018
The verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
October 8, 2015
A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy