Accellera Systems Initiative’s board of directors has approved version 1.0 of the Security Annotation for Electronic Design Integration (SA-EDI) standard for release.
Developed by the IP security assurance (IPSA) working group, the SA-EDI standard defines a specification that lets IP creators describe the security concerns that might affect their cores that need to be taken into account when integrating them into a chip. The standard makes it possible to provide the security collateral in a uniform format to integrators.
“There has been tremendous interest from the stakeholders in the development of a standard to address security concerns for hardware IP,” said Accellera chair Lu Dai. “I’d like to congratulate the IPSA Working Group on their efforts in getting this standard into the hands of IP providers concerned with tackling and reducing security risk.”
Brent Sherman, IPSA working-group chair, said, “To develop SA-EDI, we focused on using existing standards that pertain to IP specification, design, verification, and integration where security risk is a significant concern, as well as known security concerns. Using this information, we were able to develop a standard that is low overhead, non-disruptive, and scalable across multiple target implementations. I look forward to the feedback from the community as we continue to evolve the standard.”
Accellera has published a number of resources to let engineers learn more about the SA-EDI Standard 1.0, which can be downloaded for free, including a recording of a workshop held at virtual DVCon US earlier this year. Details are at the IPSA working group page.