Archives

Mentor, a Siemens business, has released details on its varied activities at DAC 2017, ranging from panels to technical papers.

Cadence Design Systems has brought its chip- and PCB-design environments closer together as the shift towards multichip packages gains pace.

The vendor's experiences in enabling concurrent engineering in Xpedition Enterprise contain lessons for all design disciplines.

A year on from the last Computex and the launch of the Cortex-A73 and Mali-G71, ARM has launched a new trio of processors aimed not just at smartphones this time but servers and driver-assistance systems.

Austemper Design Systems has launched a portfolio of tools that span the development lifecycle of projects that need to demonstrate functional safety.

DAC's traditional training day is expanding into the field of machine learning this year in Austin.

Machine learning, smarter cars, and the infrastructure to support a sixfold increase in IoT and edge devices have helped push up the number of teams doing finFET designs to more than 100, according to Tom Beckley of Cadence.

Cadence has added two apps to its JasperGold lineup that handle clock-domain crossing and linting.

Engineering consultancy pays undisclosed sum for IMGworks division.

The 63rd IEDM has issued a call for papers for its conference in San Francisco in early December and has stuck with the later deadline introduced last year.