Archives

August 11, 2017

Keynotes announced for DVCon Europe

DVCon Europe 2017 has announced two keynote speakers for the conference to be held in Munich, Germany in mid-October.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , ,   |  Organizations:
July 18, 2017

MTAPI library adds patterns for heterogeneous multicore

The latest major release of the EMB2 multicore library introduces C++ wrappers, plugins for GPU programming, and a variety of design patterns
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,
July 7, 2017

How automotive test is evolving for the age of autonomous vehicles

Automotive test has never been easy. Safety made sure of that. But the move to autonomous vehicles is making it more challenging still.
June 27, 2017

Sonics adds heat-aware DVFS to SoC power controller

Sonics has developed a version of its power-management IP core for SoCs that adds support for dynamic voltage and frequency scaling, along with the ability to tune settings according to temperature.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
June 27, 2017

Cliosoft aims to bring cooperation to design management

Cliosoft sees a merging of social features and design-data repositories as driving more efficient reuse in chipmakers, bringing them together in its recently launched DesignHub product line.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
June 20, 2017

Siemens sees Mentor helping to build fast digital twins

An emulator that extends the reach of hardware acceleration into the world of multiphysics analysis could result from the merger of Siemens PLM Software with Mentor.
Article  |  Topics: Blog - EDA, Electrical Design, Embedded, PCB  |  Tags: , , , , , , , ,   |  Organizations: ,
June 20, 2017

Formal focus for Synopsys blog

Synopsys experts are now blogging about key issues in formal verification - how to use it, which techniques to apply, and the effort/reward ratio of doing so.
Article  |  Topics: Industry Blogs, Verification  |  Tags: , , ,   |  Organizations:
June 19, 2017

Joe Costello claims IoT will drive wave of design

Former Cadence CEO tells DAC the IoT will lead to a burgeoning of chip design starts, followed by a brutal consolidation.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , ,   |  Organizations:
June 19, 2017

UltraSoc donates trace format to RISC-V group

UltraSoc has donated to the RISC-V Foundation a specification for processor trace to try to provide the ecosystem with a common way of exporting runtime data to software tools.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations: ,
June 18, 2017

TSMC encapsulates CoWoS for supersized SiP

TSMC encapsulated the multiple chips assembled on a 1200mm2 silicon substrate to cut the chance of damage from warping with the company's CoWoS2 SiP technology.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations: