mixed-signal design

ARM and Cadence have teamed up to show how system-level and implementation-level representations of a mixed-signal design can be linked together and kept in sync as the project progresses.

Accellera has published version 2.4 of the Verilog-AMS standard for mixed-signal modeling and verification as the group works on a merger of the language with SystemVerilog.

VCS AMS updates AMS verification tool and methodology

Mentor Graphics has bought Berkeley Design Automation (BDA), a specialist in analog, mixed-signal, and RF circuit verification using FastSpice.

Cadence Design Systems has developed a version of its Spectre FastSpice tool that splits simulation across many computers without manually cutting the design into segments.

Real-value modelling and flows using the Open Access database will be among the focus topics of Cadence's Mixed-Signal Technology Summit on 10 October.

Accellera has vendor extensions for IP-XACT that allow tool-specific metadata to be added to support activities such as power-aware verification and floorplanning.

Taking place in Chelmsford, MA on 27 August, the conference will feature user-authored papers, tutorials, a designer expo and keynotes from Cadence and IBM.

Cadence Design Systems has rolled out a new version of Virtuoso that deals with the physical-implementation issues that arise in the sub-28nm nodes.

The arrival of the finFET brings with it simulation and physical restrictions that might lead teams to resort to layout automation to get the job done.