January 23, 2018
Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
December 1, 2017
The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
June 12, 2016
“It’s the time between putting out an open-source ARM core and getting a letter from an ARM lawyer,” says UC Berkeley professor Krste Asanovic. So, some design teams are turning to IP that started out as open source to provide more scope for experimentation.
October 6, 2015
Memory efficiency has driven the design of the latest video and image processor core developed by Cadence Tensilica.
June 1, 2015
Altera has agreed to Intel's offer to buy the company, with FPGAs to be integrated into Xeon processors after 2016. Atoms will join programmable logic in IoT-oriented devices.
January 14, 2015
Cadence Design Systems has launched the 11th generation of Tensilica Xtensa customizable processors, with changes for VLIW, power-saving caches and memory accesses.
May 29, 2014
Synopsys has developed a digital signal processing (DSP) instruction set extension to its EM family and two cores that employ it.
November 5, 2013
Synopsys has launched the ARC HS family of configurable-processor cores, using superpipelining to target high-performance embedded applications.
March 12, 2013
The purchase of Tensilica by Cadence Design Systems could prove the way that EDA and multicore-based system design come together.
March 11, 2013
Cadence Design Systems has announced on the eve of CDNLive Silicon Valley that it has decided to buy configurable-processor company Tensilica for approximately $380m in cash.