ARM adds Cortex-A77 and Mali-G77 cores for 5G and ML
The company is also bundling its new CPU and GPU cores in a premium IP platform that can be tuned for next generation applications and devices.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
Automotive complexity drives DFT to the RTL
Design-for-test can no longer be left until the gate level for increasingly sensitive designs aimed at newer processes.
OneSpin extends line-up for AI FPGA and RISC-V verification
The formal specialist is extending its line for Intel FPGAs that target areas such as AI/ML and HPC, and building out a RISC-V suite focused on ISA compliance.
DAC 2019 Preview: Breker Verification Systems
The company will highlight features within its Trek suite that comply with but then go beyond the capabilities of the Portable Stimulus Standard.
AI and ML fuel Catapult and Calibre updates
Mentor takes the wraps off new machine learning fueled features in its HLS and physical design families ahead of DAC 2019.
Achronix deploys network on chip for faster FPGAs
Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
How PAVE360 helps set a path toward the automotive digital twin
Siemens’ new automotive platform commercializes and illustrates the company’s ongoing integration of Mentor EDA products within its digital twin concept.
DAC 2019 preview: Mentor
Mentor is active across the program and its main and Verification Academy booths within the exhibition in Las Vegas.
DAC 2019 preview: Verific Design Automation
In Las Vegas, the parser specialist will demonstrate its tools for EDA software development across VHDL, SystemVerilog and UPF.
Security, machine learning, and variety at DAC
Security and machine learning are two topics that take center stage at DAC this year, says the conference’s general chair Rob Aitken.