DAC 2019 Preview: Breker Verification Systems

By TDF Editor |  No Comments  |  Posted: May 24, 2019
Topics/Categories: Blog - EDA, - Verification  |  Tags: , , , , , ,  | Organizations: ,

Breker Verification Systems will highlight its Portable Stimulus Standard (PSS)-compliant test suite synthesis at the 2019 Design Automation Conference in Las Vegas next month.

DAC will take place at the Las Vegas Convention Center from June 2-6 (Exhibition June 3-5). Breker is exhibiting on Booth #611.

At the heart of the company’s demonstrations is its Trek family. Trek is used in design and verification flows to specify verification intent and behaviors that are reusable across target platforms through a graph-based verification and synthesis approach.

At DAC, the company will demonstrate Trek5’s capabilities beyond Portable Stimulus test generation, its capacity to optimize tests for UVM, SDV and post-silicon environments, and how it then enables the direct deployment of those tests inside existing environments. These features aim to reduce the time spent writing SystemVerilog and C code into PSS models to generate testbench code.

Another demonstration will showcase TrekDebug – for post-verification debug, profiling and coverage – alongside TrekGen – with its ability to generate tests for DSL and C++ variants of the PSS using advanced solvers. TrekGen allows path constraints and coverage to be applied across standard scenarios and has an advanced procedural mode for power users.

Attendees can schedule demonstrations on this web page.

Breker is a co-host of Verified, a celebration of the verification ecosystem, taking place on Monday, June 3, at the Topgolf Las Vegas at MGM Grand. A limited number of tickets for the invitation-only event is available from the company.

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