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An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.

Breker CEO Adnan Hamid will lead a tutorial on the Portable Stimulus Standard as part of the verification specialist's activities in Shanghai.

The verification specialist will address the challenges posed by billion-gate SoCs and the integration of formal and simulation in its presentations.

Cadence has launched a web-based EDA service the company hopes will ease the transition from self-hosted computing to more flexible cloud-based development.

RISC-V VIP offerings headline the verification specialist’s presence in Shanghai later this month.

Menta eFPGA IP is highly configurable making it well suited to the evolving designs that exploit HLS abstraction.

Siemens PLM strategy VP Stefan Jockusch will keynote on digital twins in the automotive sector at next month's conference in Shanghai.

UK-based Trackwise has shipped what could easily be the longest ever flexible PCB with a 26m-long substrate to deliver power and control to a UAV's wings.

DVCon Europe has added embedded software, digital twin, machine learning, and RISC-V to the topics the conference organizers want to cover.

Popular Verification Academy manual revamped and updated to bring it more closely in line with IEEE 1800.2 UVM and reflect the increasing use of emulation.