Expert Insights - EDA

Tom Anderson  |  May 15, 2019

Why hyperlinks are essential for HDL debugging

Text editors have major debug limitations that the use of hyperlinks in integrated development environments help you overcome.
Topics: EDA - IC Implementation, Verification  |  Tags: , , , ,   |  Organizations:   |  
Lauro Rizzatti and Gabriele Pulini  |  May 14, 2019

How emulation’s virtual mode boosts productivity: Part Two

Part two of this feature describes three use-cases that exploit the VirtuaLAB technology in HDMI, PCIe and Ethernet designs.
Topics: EDA - DFT, Verification  |  Tags: , , ,   |  Organizations:   |  
Lauro Rizzatti and Gabriele Pulini  |  May 1, 2019

How emulation’s virtual mode boosts productivity: Part One

This two-part article describes advantages when using a hardware emulation platform in virtual mode compared with in-circuit-emulation.
Topics: EDA - DFT, Verification  |  Tags: , , ,   |  Organizations: ,   |  
Paul Dempsey  |  April 2, 2019

High-level synthesis for AI: Part Two

How Chips&Media used HLS on the development of a computer vision IP block.
Paul Dempsey  |  March 26, 2019

High-level synthesis for AI: Part One

The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
Bob Smith  |  March 15, 2019

Enabling the move to a system-centric view

Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
Ashish Darbari  |  March 6, 2019

Doc Formal answers 11 key questions

The doctor was 'in' during last month's DVCon and here highlights some of the main issues in formal raised by delegates at the verification conference.
Topics: EDA - Verification  |  Tags: ,   |  Organizations:   |  
Paul Dempsey  |  January 28, 2019

Emulation for AI: Part Two

The second part of this feature looks at how Wave Computing's objectives with its dataflow processing unit for AI mapped to the use of emulation in its development.
Paul Dempsey  |  January 25, 2019

Emulation for AI: Part One

An increasing number of AI players are building their own silicon and finding that emulation is key to overcoming the major challenges.
Ashish Darbari  |  January 7, 2019

Doc Formal: Introducing the ADEPT FV flow

Escape formal's narrower definitions with a flow that shows you how to Avoid, Detect, Erase, Prove Absence and Tape Out while avoiding bugs.

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