Expert Insights - EDA

Analysts say there is a $1B market on the horizon. We talk with Mentor's Jean-Marie Brunet about where such a number could come from.

Emulators have come a long way since their first introduction nearly three decades ago.

To verify large, complex designs and meet time-to-market, you must use both simulation and emulation.

A look at how formal verification strategies can be used to check the security feature of complex SoCs for potential data leakage and data integrity issues

Sequential equivalence checking can help trap errors introduced by clock gate insertion, uninitialised registers, and X propagation issues.

These days, when it comes to innovation: The car's the star - not the stooge.

How to accelerate many aspects of software testing by using virtual prototypes to stand in for target hardware from early in the development cycle.

A look at the challenge of Ethernet verification as data rates rise and the standard is applied in a wider variety of applications.

A look at the challenges involved in PCIe verification as the standard evolves to 4.0 and beyond.

The reset state of a design can have a huge impact on the scope and correctness of verification, especially when formal techniques are applied.