How to accelerate many aspects of software testing by using virtual prototypes to stand in for target hardware from early in the development cycle.
A look at the challenge of Ethernet verification as data rates rise and the standard is applied in a wider variety of applications.
A look at the challenges involved in PCIe verification as the standard evolves to 4.0 and beyond.
The reset state of a design can have a huge impact on the scope and correctness of verification, especially when formal techniques are applied.
How to ease AMS verification using tools that improve simulation debug, ease IP integration, and speed design analysis and centering
What can you add to a challenging project without pushing out deadlines and muddling communication?
How code coverage and reachability analysis differ between simulation and formal verification techniques, and ways to use that to advantage.
Dr Walden Rhines, Mentor Graphics chairman and CEO, looks forward to the trends that will shape 2016 in the semiconductor industry.
Using formal property verification to prove that SoCs can’t do the wrong thing, as well as that they will do the right thing.
Dr Walden Rhines, chairman and CEO of Mentor Graphics, opens a two-part analysis by looking back at the dominant design and business trends in 2015.
View All Sponsors