productivity

April 28, 2022
James Paris is a senior product engineer with the Design to Silicon division of Siemens Digital Industries Software, supporting Calibre design interfaces. Prior to joining Siemens, he held roles in analog/mixed-signal physical design implementation and flow development for various IC design companies. James holds a BS in Computer-Aided Design Engineering and an MBA in Marketing.

Layout customization improves productivity in design and verification flows

What are the options and how do you balance overarching CAD requirements and personal preferences?
Expert Insight  |  Topics: EDA - DFM, IC Implementation, Verification  |  Tags: , , ,   |  Organizations:
February 27, 2014
Warren Stapleton is a Senior Fellow in AMD’s verification methodology team.

Next wave of innovation in verification technology must come from integration

The next boost to verification productivity will come from the integration of multiple strategies and tools.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
May 30, 2013
Neel Desai, Synopsys

Enabling greater productivity and schedule predictability in IC design

How to speed project start-up, boost designer productivity and increase schedule predictability using design management tools.
Expert Insight  |  Topics: IP - Design Management  |  Tags: , , ,

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