Standards

Ambipolar FETs, which can be n or p-type dependent on a control gate, could offer a new way to design circuits at 20nm and below.

Reviewing some of the sector's main trends with Susan Peterson, group director for VIP at the market leader.

The Object Management Group has adopted the Vector Signal and Image Processing Library (VSIPL) for C and VSIPL++ for C++ as standard specifications that it will manage and promote.

The scope of the Low-Latency Interface (LLI) developed by the MIPI Alliance is expanding as it heads towards version 2 – increasing the ways in which a single DRAM array can be shared between SoCs in a mobile phone.

Accellera has approved version 1.0 of the Unified Coverage Interoperability Standard (UCIS). Here's how it works.

The Silicon Integration Initiative (Si2) is targeting the end of the year for release 2.0 of its OpenDFM standard, which will include support for DRC+ and make it possible to build search engines for yield.

But as it celebrates a decade of OpenAccess, the standards body also looks toward the future in PDKs, advanced DFM and 3D.

UCIS 1.0 will provide a common format to analyze and compare data from different vendors' tools. Yup, it's a 'Biden' of a deal.

The partnership's 3.1 specification is open for review, with performance enhancements and alignment to Accellera's IP-XACT for metadata