Standards

Benchmarking organization EEMBC has kicked off an effort to develop a set of performance tests for edge nodes for the Internet of Things (IoT).

The Embedded Microprocessor Benchmark Consortium (EEMBC) has released a benchmark suite aimed at applications processors and higher-performance microcontrollers with floating-point units.

Accellera has set up a working group to develop a language-independent way of capturing and managing test stimuli that can be used across a wide range of verification environments.

Siemens has developed an open-source implementation of the Multicore Association's MTAPI to make it easier to divide and manage concurrent tasks that run on systems with multiple processors.

DVCon Europe brings design and verification insights to Munich next week.

The Liberty library format has been extended to cope with the most common forms of on-chip variation analysis in use today on nanometer processes.

As well as starting up a version for the European market, the Accellera Systems Initiative is taking DVCon to India in the early autumn.

STMicroelectronics is using the OpenPDK standard from Si2 to speed up the production and delivery of process design kits (PDKs) and asks for wider adoption by foundries.

Accellera has released the latest version of the Universal Verification Methodology (UVM) class reference document, with additions to the way in which testbenches can handle messages and registers.

Accellera has published version 2.4 of the Verilog-AMS standard for mixed-signal modeling and verification as the group works on a merger of the language with SystemVerilog.