Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
June 16, 2020

Transistor stacks piled high at VLSI

As 2D scaling becomes increasingly difficult, researchers reporting at VLSI Symposia have focused attention on what can be done in the third dimensions to improve density and performance without a sudden break from conventional CMOS processes.

June 15, 2020

EDA in the cloud boosts DRC iterations for AMD

AMD worked with Microsoft and Azure to cut DRC runtimes and control memory usage for a 7nm cloud-based design.

June 10, 2020

Onchip sensors aim for finer-granularity heat measurements

Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.

June 9, 2020

Real Intent tries to shift left on DFT

Real Intent has launched a DFT tool intended to relax the bottlenecks that occur as an SoC project moves into its final phase ahead of tapeout.

May 28, 2020

Coverage without tears

A technical paper originally presented at DVCon USA 2020 simplifies the creation of coverage strategies using manual, automated and verification IP components.

May 28, 2020

IEDM plans for San Francisco in December

The IEEE plans to stage the 66th International Electron Device Meeting as a physical event in mid-December.

May 26, 2020

DVCon 2020 to repeat sessions online

DVCon US is to repeat sessions online from today until the middle of August, with exclusive access to registered attendees through early June.

May 26, 2020

Nanometer scaling puts focus on power at VLSI in June

Adaptive power-aware clocking and buried rails are among the techniques to be explored at the 2020 VLSI Symposia.

May 22, 2020

Parasitic extraction to guide capacitor usage in RF SoCs

A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.

May 15, 2020

Coronavirus Resources: Mentor

Live and on-demand videos as well as You Tube ‘tips and techniques’ clips form part of a wide ‘work at home’ support package from Mentor.

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