Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
February 25, 2020

Wind River sets up labs site to drive IoT and AI applications

Wind River has set up a site to distribute more experimental libraries based around its real-time operating systems and provide a hub for users to interact.

February 24, 2020

DVCon US 2020 preview: Mentor

Mentor will have a very broad presence at DVCon across technologies such as HLS, formal verification, simulation and emulation.

Tags:  |  No comments
February 24, 2020

DVCon US 2020 preview: SmartDV

The latest in MIPI and DDR design and verification IP as well as protocol debug are highlights in SmartDV’s DVCon program.

February 19, 2020

Embedded World 2020 preview: Mentor

Six papers, a dedicated automotive sessions and demos including the use of the Nucleus for RISC-V are among highlights in Mentor’s Embedded World agenda.

February 18, 2020

Accellera moves to working-group stage for functional-safety standard

Accellera has set up a working group with the aim of developing interoperability standards for functional safety.

February 14, 2020

Debug connects with manufacturing test to cut product recall costs

UltraSoC has kicked off a collaboration with PDF Solutions to build a system better able to use runtime information to identify devices that are likely to fail in the field and so reduce the impact of product recalls.

February 12, 2020

AI processor company opts for Analog FASTSPICE and Symphony

Mythic will use the Mentor tools for its analog-targeted intelligence processing units.

February 10, 2020

Arm adds AI to Cortex-M cores

Arm has launched a pair of cores intended to bring acceleration for machine learning to its Cortex-M series of processors.

January 29, 2020

Toward more efficient formal strategies for deadlock

Deadlock is hard to detect even though there are formal strategies for doing so. But wouldn’t it be better if you could automate that work? Now you can.

January 28, 2020

Earlier latch-up prevention with topology-based analysis

By analyzing topology during the schematic design phase, you can detect latch-up issues before post-layout ERCs and avoid late stage revisions.

Previous Blog Posts
Next Blog Posts

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors