Blog Topics

May 3, 2016

Cadence boosts MAC count for neural networks

Cadence Design Systems has increased the throughput of its vision-oriented DSP family to cater for deep-learning applications.
April 20, 2016

Toward easier, faster test pattern simulation

Validating test patterns is a notoriously tricky and laborious process. Mentor Graphics has some new ideas on that front.
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April 13, 2016

User2User preview: Silicon Valley edition rolls out this month

Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
April 8, 2016

SNUG 2016: Aart de Geus looks beyond the linear design flow

Do the synapses in the human brain offer a new model for the design flow in a Smart Everything world?
April 7, 2016

SNUG 2016: Intel, TSMC, GloFo back post-finFET research at UC Berkeley

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
April 5, 2016

Cadence moves into safer design with Virtuoso changes

Cadence Design Systems has made additions to its Virtuoso mixed-signal design environment intended to improve design for manufacture and the ability of teams to create and test safety-critical systems.
April 4, 2016

HyperLynx made broader and easier to use

HyperLynx from Mentor Graphics has moved into a new generation with more integrated features beyond PI and SI, and an easier to use GUI.
March 31, 2016

Meet the Electronic System Design Alliance

The EDA Consortium is rebranding and extending its activities to better reflect all the tools and services that now comprise IC design.
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March 31, 2016

53rd DAC conference program announced

The 53rd Design Automation Conference has published its program for the upcoming event in Austin, Texas, which will include keynotes from AMD, nVidia, and NXP Semiconductors and tracks that connect electronics to biology.
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March 22, 2016

Spectrum analyzers aim for IoT projects

Tektronix has aimed a pair of RF instruments at the growing number of engineering teams trying to incorporate low-power wireless communications into their designs.
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