SNUG 2016: Aart de Geus looks beyond the linear design flow
In his keynote to the Silicon Valley chapter of the SNUG User Group, Synopsys President and co-CEO Aart de Geus sought to untangle both the main market driver for electronics, the Internet of Things, and the challenges it presents for system design. Useful in itself, it also took him to some interesting ideas about the design flow.
The IoT provided the sound bites. Was, de Geus wondered, this nebulous concept seeding “immensely optimistic thinking”? Or, given that “every IoT device is equivalent to putting a kitchen window in a bank”, should the industry rather be focusing on “the Internet of Threats”? A bit of the first – a lot of the second.
But de Geus also said that he retains his own immense optimism. If the challenges of the IoT are to be met, he prefers to think of moving toward a “Smart Everything”. That is not a bad way of recasting the IoT – it implies the need to consider every aspect of design. To the traditional demands of power, performance and area, we must now add the 4Ss – sensors, security, safety and software – and consider all these elements with equal weight.
But how do you start to build a new analog for the design flow that enables that?
Design flow connections within connections
According to de Geus’ concept of Smart Everything, we are entering an era where the digital world is composed of “smart islands that connect in various ways – the world’s brain”. We are moving away from linear processes to ones more like the fluid connections between synapses. So why not apply the same ideas to a design flow?
Instead of seeing the design flow as a series of sequential tasks, consider it instead as made up of competencies that interact as appropriate at various stages. The human brain is not a bad analog for understanding the full and continuous implications of, say, hardware-software co-design or the abstraction of verification tasks up and across a project.
De Geus had some good examples. Some building blocks are in place that will help deliver the 10-100X performance improvements needed for Smart Everything: for example, finFET semiconductor technology has the legs to get to 5nm and the first IP tape-outs for 7nm are expected this year. But with algorithms playing an increasing role and growing rapidly in sophistication, the design flow probably also needs the kind of early-stage analytics that allow us to adapt architectures to them. That’s a big leap beyond eventually chucking an FPGA-based prototype at your coding team.
De Geus was unquestionably talking up Synopsys’ own strategy. In addition to the company’s bid for every significant stage in hardware design, its recent acquisition history shows the company strongly strengthening its hand in software (e.g., Coverity in code sign-off). Soup-to-nuts – and some way beyond the traditional boundaries of EDA.
But that does not invalidate the need to rethink design processes, how they interconnect and what they need to include. Rather, the tool line-up reflects that trend, and the synaptic comparison stands whether you work with a range of tools from multiple vendors or just one. Synopsys’ pitch is that its tools are those created to best play together as the connections become more complex.
Nevertheless, as de Geus concluded, “Smart Everything needs Smart Everybody.”
Leave a Comment
You must be logged in to post a comment.