Blog Topics

June 9, 2017

DAC 2017 preview: Verific Design Automation

Parser specialist will highlight work with a low power startup and new features for platforms supporting UPF.
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June 8, 2017

DAC 2017 preview: OneSpin

Formal, AI and UVM form key parts of the OneSpin agenda for this year's Design Automation Conference.
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June 8, 2017

DAC 2017 preview: Uniquify

Vendor concentrates on memory IP products at 2017 Design Automation Conference.
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June 6, 2017

Tektronix scope reconfigures for mixed signals

An ASIC-based design has allowed Tektronix to build an oscilloscope that can mix and match analog and digital channels.
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June 5, 2017

Mentor builds links for multichip package integration

Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together.
June 1, 2017

DAC 2017 preview: Mentor

Mentor, a Siemens business, has released details on its varied activities at DAC 2017, ranging from panels to technical papers.
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May 30, 2017

Cadence pulls Virtuoso and Allegro closer for 3DIC

Cadence Design Systems has brought its chip- and PCB-design environments closer together as the shift towards multichip packages gains pace.
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May 30, 2017

How Mentor realized concurrent engineering for PCB design

The vendor's experiences in enabling concurrent engineering in Xpedition Enterprise contain lessons for all design disciplines.
May 29, 2017

ARM extends top end of Cortex-A family

A year on from the last Computex and the launch of the Cortex-A73 and Mali-G71, ARM has launched a new trio of processors aimed not just at smartphones this time but servers and driver-assistance systems.
May 24, 2017

Austemper tools straddle the functional-safety flow

Austemper Design Systems has launched a portfolio of tools that span the development lifecycle of projects that need to demonstrate functional safety.

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