DAC 2017 preview: Oski Technology

By TDF Staff |  No Comments  |  Posted: June 14, 2017
Topics/Categories: Blog - EDA, - Verification  |  Tags:  | Organizations: ,

Oski Technology will demonstrate its formal verification intellectual property (VIP) library for ARM Advanced Microcontroller Bus Architecture (AMBA) interface protocols and its formal sign-off methodology at the 2017 Design Automation Conference (Booth #1139).

Verification engineer Deepa Sahchari will describe ‘Architectural Formal Verification of Cache Coherent Protocols’, along with Chirag Gandhi, Arteris IP’s senior hardware verification manager, as part of the ‘New Frontiers in Formal Verification’ strand in the Design, EDA Track on Wednesday June 21 from 10:30AM-12:00PM.

The Oski booth theater returns at DAC 2017. It will provide a venue for talks on key topics related to formal property verification, including sign-off methodology, test planning, abstractions, coverage and more. Oski will host four different presentations on formal verification methodology each day.

Kamal Sekhon, a formal verification applications engineer with Oski, will also present ‘Architectural Formal Verification: A Three-Step Guide’ in the Verification Academy Booth (#429) on Tuesday, June 20, at 10:00AM.

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