EDA

Deep pipelines and dynamic memory sharing may provide the key to the development of faster and more efficient server-farm blades as the focus in hardware design moves to augmenting conventional processors with specialized accelerators.

A faster implementation program for the POP support IP for ARM's cores has delivered a 16nm finFET package for the Cortex-A73 shortly after the core's Computex launch.

Ausdia has launched a product intended to reconcile the multiple sets of timing constraints needed for operating and test modes so that a consistent group of constraints can be fed to implementation tools.

ARM aims to recruit more startups to develop IoT SoCs around the Cortex-M0 with design-house network and easier access to EDA tools.

Startup launches an analog-circuit migration and optimization tool that uses less simulation time than traditional approaches the company claims.

Menta SAS has launched an embedded FPGA core family that improves density over previous versions.

Concept Engineering is introducing a version of its Nlview family of automatic schematic generation products that runs inside a standard web browser.

Samsung Foundry has adapted Mentor's DFM and test tools in a system that can produce a 10% increase in yield across all nodes.

Meridian Constraints update seeks to extend existing capabilities and address a gap not covered by other functional verification tools.

Ahead of June's Design Automation Conference, Agnisys and Semifore have both released tools aimed at reducing the overhead of implementing register-rich SoCs.