ARM has expanded its DesignStart program to attract more IoT-focused SoC design projects around the Cortex-M0 by incorporating design tools and building a network of design houses to implement the devices.
Nandan Nayampally, vice president of marketing and strategy of the CPU group at ARM, said the aim is to “simplify access to the M0. Now the EDA ecosystem is helping us. The main targets are startups and makers. We are also seeing OEMs in white goods who want to start building their own solutions rather than using standard microcontrollers”.
Nayampally pointed to the availability of multiproject wafer services for processes as being relatively affordable, quoting costs of $16,000 for samples of a 25mm2 chip at 130nm and $42,000 for 16mm2 at 65nm.
“You can download the M0 for free with a clickthrough license, put your logic into an FPGA to test it. This is really good for startups and makers to prove their designs out. Then use a fast-track licence for production,” said Nayampally.
To support designs, Cadence Design Systems and Mentor Graphics have agreed to provide access to some of their tools through web-based interfaces. Mentor’s Tanner group is providing evaluations of its portfolio of layout tools thorough the Mentor Virtual Lab software that can be used to kick off a project as well as collection of tools that combine the Tanner custom layout tools with place-and-route and DRC from the parent company. For its role in the program, Cadence is providing hosted version of a package of its own mixed-signal tools though a browser interface.
For teams who do not want to perform their own implementations, ARM has started a design-house partners program. Chris Shore, training manager for partner enablement, said: “It is a new network of carefully chosen design-house partners that’s linked with the DesignStart program. A lot of companies are coming into this who haven’t done their own custom SoC before. This program fills the knowhow capability gap that many of these customers have.”
To become part of the Approved Design Partner program and offer design services, Shore said companies need to pass a number of criteria: “We want a proven track record. We check them out, looking at their IP security, financial stability and their design-flow procedures. All of the partners we have announced have been through that process. And we will audit them very two or three years.”
The design partners ARM has recruited so far are eInfoChips, Open-Silicon, SoC Solutions, Sondrel.
“The ARM Approved program will grow,” Shore said, with other initiatives looking at security, network infrastructure, Linux support among other areas, he added.