DVCon India heads to Bangalore
As well as starting up a version for the European market, the Accellera Systems Initiative is taking DVCon to India in the early autumn.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
OpenPDK accelerates design kit production at ST
STMicroelectronics is using the OpenPDK standard from Si2 to speed up the production and delivery of process design kits (PDKs) and asks for wider adoption by foundries.
Sensor-hub infrastructure moves to open source
With the aim of accelerating the development of applications and algorithms that harness sensor fusion, startup Sensor Platforms has released as open source its Open Sensor Platform (OSP).
Don’t just whine – it’s time for you to help shape DAC 2015
Any conference can only be as good as the feedback it gets. And next year’s DAC team is actively looking for yours. It’ll be worth your time.
Accellera releases version 1.2 of UVM
Accellera has released the latest version of the Universal Verification Methodology (UVM) class reference document, with additions to the way in which testbenches can handle messages and registers.
14nm FD-SOI pushes strain and body bias for power savings
At the VLSI Technology Symposium a team led by STMicroelectronics described the techniques used for the upcoming 14nm FD-SOI to boost speed and density over the 28nm version.
Path to 5nm plotted at DAC panel
Panel discusses Moore’s law scaling beyond the 14nm node to 5nm, where economic, device, interconnect, materials, lithography and design issues abound
Internet of Things: an opportunity, but for whom?
Building the internet of Things will demand collaboration and a healthy ecosystem
Verilog-AMS release adds to power-aware analog modeling
Accellera has published version 2.4 of the Verilog-AMS standard for mixed-signal modeling and verification as the group works on a merger of the language with SystemVerilog.
Applications won’t find all the bugs, but they have their uses
Can applications provide useful input for verification? They can but not when run straight out of the box, panelists at DAC 2014 said.