Tech Design Forum
Briefing
trailing edge
trailing edge
March 14, 2012
DATE notebook: EDA for the rest of us
Old processes don't necessarily equate to old tools, panelists argued at DATE, especially when a lot of future work will be done on more-than-Moore, 3DIC technologies.
Article | Topics:
Commentary
,
Conferences
,
Design to Silicon
,
Digital/analog implementation
,
Blog - EDA
| Tags:
3DIC
,
DATE 2012
,
more than Moore
,
trailing edge
Briefing Topics
EDA
DFT
Electrical Design
Embedded
IP
PCB
Expert Insights
PLATINUM SPONSORS
View All Sponsors
twitter
facebook
RSS
Tech Design Forum
Log In
Register
Sponsors
Briefing
EDA
EDA TOPICS
DFM
DFT
ESL
IC Implementation
Verification
MORE EDA
Expert Insights
Guides
EDA Home Page
IP
IP TOPICS
Assembly & Integration
Design Management
Selection
MORE IP
Expert Insights
Guides
IP Home Page
PCB
PCB TOPICS
Design Integrity
Layout & Routing
System Codesign
MORE PCB
Expert Insights
Guides
PCB Home Page
Embedded
EMBEDDED TOPICS
Architecture & Design
Integration & Debug
Platforms
User Experience
MORE EMBEDDED
Expert Insights
Guides
Embedded Home Page
Search