ASSP shift continues as design starts fall
Gartner has released its estimates for chip design starts out to the middle of the decade. Both are falling but the emphasis is shifting to ASSPs and mainstream processes.
Author Archives: Chris Edwards
Full-flow 450mm line in 2015 says IMEC
Belgian research institute IMEC has stepped up its plans for 450mm development and now aims to have an operational full-flow pilot line by the end of 2015, according to president Luc Van den hove speaking at ISS Europe this week.
‘Virtual foundry’ plan for plastic chips
The COLAE project will use the production facilities at European research centres to provide printed-electronics production services to startups. But it will probably involve more joint process work than the conventional foundry model.
System-level design meets power
In the world of power semiconductors, not many companies try to go fabless. The tradeoffs between design and process offer many more options for system-level design, argued Infineon's Reinhard Ploss at the ISS Europe conference.
Intel takes considered route to FinFET
The International Solid-State Circuits Conference (ISSCC) this year provided an opportunity to see how the team that was first to put a finFET or trigate-based process into action on a multi-million transistor design did it.
ITRS update goes online
The wait is over for the latest edition of the International Technology Roadmap for Semiconductors (ITRS).
Near misses don’t teach the right lessons
Y2K taught the world some lessons: but mostly the wrong ones, according to Martyn Thomas in his keynote at the Safety-Critical Systems Symposium 2012.
Tech Design Forum is changing
The Tech Design Forum is going through some more changes as we add features and resources.
Lessons from beneath the surface
When looking at new architectures for low-power operation, it is easy to get fixated on one part of the design and ignore the ramifications for the rest of the system. The consequences of that are demonstrated in a paper that was presented at last year’s International Symposium on Low-Power Electronic Design in Japan that shows […]