Conferences

But as it celebrates a decade of OpenAccess, the standards body also looks toward the future in PDKs, advanced DFM and 3D.

Atrenta is updating existing tools and planning new ones to help designers get the most bang for their joule.

UCIS 1.0 will provide a common format to analyze and compare data from different vendors' tools. Yup, it's a 'Biden' of a deal.

Designers working on mixed-signal circuits will benefit from using digital tools, Cadence's SVP of R&D for custom design said at CDNLive EMEA today. But for those who don't a faster fast Spice is on its way.

Mentor Graphics' CEO Wally Rhines picked out the trends he says can boost design productivity and drive growth for tools vendors at the company's Silicon Valley User2User conference

Companies need to collaborate with partners, vendors, and the rest of the supply chain if they are to achieve critical mass, Aart de Geus tells Synopsys user meeting.

This page brings together all of our coverage from Design Automation and Test in Europe 2012 in Dresden, Germany.

Aldec has updated its Riviera Pro tool to provide more support for OS-VVM, the recently launched verification methodology for VHDL

Until the software is ready, it's often hard to tell when two neighbouring units on an SoC could combine to push the package past its maximum thermal point. Docea Power aims to help.

Blue Pearl Software has extended its reach into the world of field-programmable gate array (FPGA) design and verification with a project that has culminated in a tighter integration between its timing analysis tools and the Synopsys Synplify Pro tool.