DFM

October 6, 2022
3D-IC Stack LVS Connectivity

Building confidence and flexibility in 3D-IC system level design

3D-IC presents major connectivity challenges in maintaining a golden netlist and managing necessary exceptions. Learn how to manage them.
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May 10, 2022
Coordinate-based checks feature

A quick and easy way to calculate P2P resistance and current density

Coordinate-based checking provides a streamlined way to verify designs around ESD before full-chip runs without the need for custom checks.
April 28, 2022
James Paris is a senior product engineer with the Design to Silicon division of Siemens Digital Industries Software, supporting Calibre design interfaces. Prior to joining Siemens, he held roles in analog/mixed-signal physical design implementation and flow development for various IC design companies. James holds a BS in Computer-Aided Design Engineering and an MBA in Marketing.

Layout customization improves productivity in design and verification flows

What are the options and how do you balance overarching CAD requirements and personal preferences?
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January 13, 2022

Siemens’ Sawicki puts priority on scaling in processes, productivity and systems

More optimistic about the semiconductor industries prospects than for some time, Siemens Joe Sawicki identified key EDA challenges at DAC.
November 12, 2021
Pre-processing and post-processing techniques for verification

How to optimize productivity and accuracy in IC design and verification flows

Pre- and post-processing EDA techniques help streamline design rule checks and delivery efficient waivers to speed design and debug.
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September 13, 2021
Swathi Rangarajan is a principal product engineer in the Calibre Design Solutions division of Siemens Digital Industries Software, supporting the Calibre RealTime platform. She focuses on in-design sign-off Calibre DRC checking in custom and digital design tools. Before joining Siemens, Swathi was an application engineer focusing on custom and digital design tool suites. Swathi received her BS in electronics and communication engineering from India, and her MS in engineering from San Jose State University

Hit your tapeout schedules with in-design signoff DRC

Delivering physical implementations at new process nodes is getting ever harder. Learn how to stay on track by checking work is rule-compliant as you go.
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July 20, 2021
Credit: laborotorio linux

Making sense of cloud EDA

How to carry out a sensible analysis of cloud EDA's potential, so you get the right tools and computational resources to deliver increasingly complex designs.
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May 31, 2021
Srinivas Velivala is a principal product manager with Calibre Design Solutions in Siemens EDA, a part of Siemens Digital Industries Software. His primary focus is the development of Calibre integration and interface tools and technologies. Before joining Siemens EDA, he designed high-density SRAM compilers. In addition to more than 12 years of design and product management experience, Srinivas holds a B.S. and M.S. in Electrical and Computer Engineering.

How you can decide what level of DRC you need when you need it

Using on-demand rule checks during place-and-route boosts efficiency and design quality.
October 16, 2020
Dina Medhat - Mentor

Not using reliability check waivers? You’re wasting valuable time

Reliability rule checks need - and now get - more granular analysis that allows designers to adopt proposed waivers with much greater confidence.
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August 14, 2020
John Ferguson is the product management director for Calibre DRC applications at Mentor, a Siemens BusinessHe holds a B.Sc. degree in Physics from McGill University, an M.Sc. in Applied Physics from the University of Massachusetts, and a Ph.D. in Electrical Engineering from the Oregon Graduate Institute of Science and Technology.

EDA innovation is the foundation of progress

For physical verification and beyond, each process node requires new thinking, new tools and greater performance.
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