overstress

October 19, 2023
Neel Natekar is a senior product engineer in the Design to Silicon division of Siemens Digital Industries Software. Prior to joining Siemens, Neel worked as a design engineer focusing on power delivery solutions for custom CPUs. He received a B.Eng. in Electronics and Telecommunications from the University of Mumbai, and an M.S. in Electrical Engineering, Circuits and Microsystems from the University of Michigan.

Simplify and accelerate PV debug using default results data views

Standard physical verification (PV) check reviews within EDA tools can reduce time-to-tapeout and mitigate risk.
Expert Insight  |  Topics: EDA - DFM, - EDA Topics, EDA - Verification  |  Tags: , , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors