February 1, 2018
A new technique has been developed to catch potential new lithography issues when little design data is available for incoming nodes.
January 15, 2018
How to get the best PV results by reducing computational demands; handling data more efficiently and exploiting parallelization.
November 24, 2017
John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
October 27, 2017
How to address increasingly complex patterning issues and debug them efficiently as design moves toward 12 and 10nm.
September 21, 2017
Diagnosis-driven yield analysis identifies the cause of systematic yield loss to speed the ramp-to-volume on new processes and improve yield on mature ones.
September 14, 2017
An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
August 30, 2017
Pattern-based design/technology co-optimization (DTCO) estimates lithographic difficulty during the early stages of a new process technology node.
May 8, 2017
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
March 22, 2017
The equipment giant's Computational Process Control strategy takes a pragmatic approach to Industry 4.0 and is likely to influence EDA tools for incoming nodes.
October 3, 2016
Multi-patterning, finFETs and more are forcing more detailed overhauls of P&R software at each process node. We dig into some of the key new issues and how they are being addressed.