It was a year of ‘firsts’ for SEMICON West.
It marked the first time that EDA vendors had commanded a real presence at the event. Their participation stretched across the exhibit hall and technical program as ES Design West. All this presaged 2020’s show when the better-known Design Automation Conference (DAC) will officially co-locate in San Francisco with SEMICON West.
Another first for the conference was a significant move away from its long-standing focus on the decline of (or, if you prefer, preservation of) Moore’s Law. What topic replaced it? None other than artificial intelligence (AI). Indeed, AI was so central to the show that it got its own dedicated day.
And staying with the initial theme, other firsts included roadmapping from the Quantum Economic Development Consortium (QED-C). Meanwhile there was also confirmation that the number of SEMI standards has now reached 1,000.
Let’s consider these ‘firsts’ in a bit more detail.
AI Design Forum
SEMICON West drew quite the crowd to its AI Design Forum. A mostly technical audience heard from industry leaders in the semiconductor, system design and manufacturing spaces. They outlined their visions for the coming era of AI.
One consistent observation was that the Internet of Things (IoT), big data and AI are already transforming the world’s major industries. What differentiates this transformation from those of the past is a reduced focus on specific physical and economic targets within Moore’s Law and a greater one upon new computing architectures. Traditional PC and smartphone architectures no longer provide the performance, power and cost benefits needed for the IoT and the machine-learning aspects of AI. Quantum computing is poised to fit into some of these chip level architectural and software changes.
Synopsys chairman and co-CEO Aart de Geus was one of the first keynoters at the AI Forum. He highlighted this shift from one computational era to the beginning of another. De Geus explained that we have been privileged to be part of the last 50 years of Moore’s Law, and are now at the beginning of another era of exponential innovations. For him, the issue is only one of dynamically different chip architectures but also the fusion of silicon (hardware) and software with AI as both enabler and determiner of the evolving computational form. He sees simulation, modeling and virtual prototyping as crucial to this process.
Other forum keynoters followed in similar vein. They addressed such themes as existing and future computational innovation for the edge and cloud networks, coming changes in hardware and software interactions, and the need for new materials. One common reference point is the need to develop intelligence between, on one hand, sensors, gateways, and networks at the interconnected edge and, on the other, the cloud.
European AI collaboration
One example of how edge-AI is an increasingly important theme in research came during SEMICON West in a presentation by two leading European R&D centers, CEA-Leti of France and the Microelectronics Institute within Germany’s Fraunhofer Society.
They described joint research around the development of intelligent products that will use neuromorphic computing techniques. This branch of AI R&D looks into the creation of electronic circuits that mimic neuro-biological architectures present in the human nervous system.
The two institutes’ work toward edge-AI systems is building up Leti’s strength in fully-depleted silicon-on-insulator (FD-SOI) chip design and the expertise of both Fraunhofer and Leti in 3D packaging. There is also the likelihood that it will draw upon finFET architectural research by another EU R&D powerhouse, Belgium’s Imec.
This type of research reflects the edge’s increasing importance as the point where where most decision-making and data hand-offs will occur. The ability to process algorithms locally at the edge – and close to commercial and industrial IoT devices – will be necessary for many applications. Examples include applications based around AI within consumer electronics and smartphones (e.g., Siri and Alexa), autonomous driver assist functions, and factory floor automation. It is a list that grows longer every day.
AI computations will inform independent decisions based on the automatic processing of different types of data. Moreover, processing at the edge instead of in the cloud is seen as a way to reduce cybersecurity threats.
Leti and Fraunhofer will discuss their further progress this December at the International Electron Devices Meeting (IEDM) in San Francisco.
One reason why Aart de Geus and other industry leaders expect AI and emerging computational chip architectures to foster exponential innovation is that these technologies draw upon many technical disciplines and markets, many of which have hitherto had little to do with one another. A good example here is how quantum algorithms are currently being used to transform the field of artificial neural network optimization, the basis for AI and machine learning.
Growing interest in the connections between AI and emerging quantum computing techniques was visible during SEMICON West. The US federal government-backed, Quantum Economic Development Consortium (QED-C), led by SRI International, discussed some of its near-term goals. It described the supply-chain challenges that must be met to address enabling technology, the types of standard and metric that will be required, and the workforce skills that will be needed to guide the US government’s investment priorities in quantum R&D.
Speaking of such formal frameworks, SEMI announced the publication of its 1,000th SEMI International standard since the launch of its program in 1973. SEMI runs Semicon West and develops supply chain standards among many other activities.
At first glance, it may seem that SEMI standards – which focus on equipment and manufacturing processing and supply chain issues – have little in common with EDA chip development, tools and intellectual property (IP) concerns. But traditional boundaries are vanishing.
Increasingly SEMI and its leading EDA standards equivalent, Accellera, are coming to share technical concerns in key areas such as chip and substrate packaging, IP and global supply and development processes.
ES Design West
The increasing common ground between two once very separate market segments – capital equipment and chip design tools – provides a nice segue into a few casual observations about the inaugural ES Design West show, held during SEMICON West.
ES Design West was billed by SEMI and the ESD Alliance as the annual expo that would connect electronic systems design to the entire electronics supply chain. This is certainly a timely and worthwhile goal. But there are a few wrinkles that need to be worked out.
The ES Design West area with SEMICON West was really like a miniature version of DAC, an event that had itself taken place only a month earlier. It was therefore not surprising that some EDA vendors who had been at DAC decided not to attend another similar conference so soon afterwards. Meanwhile some of those vendors that did, claimed to detect a still somewhat awkward intersection – quite literally – that could see semiconductor capital equipment component suppliers of pumps and machines exhibiting directly across the aisle from EDA software vendors.
However, for 2020, DAC will be located in Moscone West, putting it close enough to SEMICON West to be part of the buzz – thereby reflecting how different parts of the supply chain are eliding – but also far enough away so as not to be detrimentally confused with the fab hardware suppliers. It’s a union that should work. Some might even say it has to work to ensure the entire semiconductor industry remains in sync.