IC Implementation

December 2, 2016
Synopsys Diagram2

Hierarchical signoff of SoC designs at advanced process nodes

Hierarchical signoff strategies for large SoCs at advanced nodes can be effective if sufficient attention is paid to reflecting the impact of cross-hierarchy parasitics.
November 29, 2016
Ken Brock, product marketing manager, Synopsys

Six ways to exploit the advantages of finFETs

FinFET processes and libraries are maturing, enabling designers to explore the best ways to take advantage of the capabilities of the new transistor design
Expert Insight  |  Tags: , , ,   |  Organizations: ,
October 3, 2016
Dr Walden Rhines is Chairman and CEO of Mentor Graphics

Wally Rhines separates the signal from the noise

Mentor's chairman and CEO has dug into why chip sales forecasts often miss the target and suggests some tools for assessing the Internet of Things.
October 3, 2016
Place and route beyond 10nm

How place and route is adapting to challenges below 10nm

Multi-patterning, finFETs and more are forcing more detailed overhauls of P&R software at each process node. We dig into some of the key new issues and how they are being addressed.
August 18, 2016
A73 core performance vs process

Challenges of tool, process and design collaboration at advanced nodes

A look at how collaboration between design, process and tool development is becoming increasingly important to get the best out of the most advanced nodes.
Article  |  Tags: , ,
June 1, 2016
How Google and Qualcomm use HLS and HLV

How Google and Qualcomm exploit real world HLS and HLV

By taking a pragmatic approach, the two technology giants have comfortably adopted high-level synthesis and verification - and have shared their experiences.
Article  |  Tags: , , ,   |  Organizations: , ,
May 10, 2016
USB Type C connector

Implementing USB Type-C

A look at three design challenges for USB Type-C: implementing two SuperSpeed datapaths on a reversible connector; partitioning the design to support multiple USB Type-C variants; and partitioning the management software.
Article  |  Tags: , ,   |  Organizations:
April 26, 2016
Andrew Macleod is Director of Automotive Marketing for Mentor Graphics. He has more than 15 years of experience in the automotive software and semiconductor industry, with expertise in new product development and introduction, product management and global strategy, including a focus on the Chinese auto industry.

Still using Moore’s Law to beat up on the automotive industry?

These days, when it comes to innovation: The car's the star - not the stooge.
Expert Insight  |  Tags: , , , ,   |  Organizations:
February 22, 2016
ICCII floorplanning article - featimg

Floorplanning complex SoCs with multiple levels of physical hierarchy

How to work with multiple levels of physical hierarchy when floorplanning multicore, multiport, multi-million gate SoCs
February 18, 2016
RTL Floorplanning - Featured Image

How new RTL floorplanning techniques speed physical design

Advances in RTL floorplanning help cut front-to-back-end iterations, speed synthesis by 10X and boast the capacity needed for today's designs.

PLATINUM SPONSORS

Mentor Graphics GLOBALFOUNDRIES Synopsys Samsung Semiconductor Cadence Design Systems
View All Sponsors