The second part of this feature looks at how Wave Computing's objectives with its dataflow processing unit for AI mapped to the use of emulation in its development.
An increasing number of AI players are building their own silicon and finding that emulation is key to overcoming the major challenges.
In a continuous-build design flow, at which level should your error markers be addressed?
Adoption of high-density advanced packaging (HDAP) needs tools and supports to build designers' confidence in the emerging technology.
Andy Ladd highlights the wide range of peak-power concerns around plugged-in devices.
The authors descirbe a new signature-based approach to resolving the content of layouts in GDSII, OASIS and other formats.
Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.
A new version of the automotive safety standard arrives later this year. Review the main updates and see how it will combine with the incoming SOTIF autonomous driving standard.
In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.
John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
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