IC Implementation

January 28, 2019

Emulation for AI: Part Two

The second part of this feature looks at how Wave Computing's objectives with its dataflow processing unit for AI mapped to the use of emulation in its development.
January 25, 2019

Emulation for AI: Part One

An increasing number of AI players are building their own silicon and finding that emulation is key to overcoming the major challenges.
January 25, 2019

A better way to manage error reporting at the chip and block levels

In a continuous-build design flow, at which level should your error markers be addressed?
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November 20, 2018
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Adding system-level, post-layout electrical analysis to HDAP design and verification

Adoption of high-density advanced packaging (HDAP) needs tools and supports to build designers' confidence in the emerging technology.
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June 18, 2018
Andy Ladd is president and CEO of Baum. He has more than 30 years of experience in the electronics industry. Ladd received a Bachelor of Science degree in Computer Engineering from the University of Illinois at Champaign/Urbana, and a Master of Science degree in Engineering from the University of Michigan at Ann Arbor.

Power analysis isn’t just for battery-operated products

Andy Ladd highlights the wide range of peak-power concerns around plugged-in devices.
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May 31, 2018
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Layout-database file control: the missing link

The authors descirbe a new signature-based approach to resolving the content of layouts in GDSII, OASIS and other formats.
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April 23, 2018

How eFPGAs will help build the brave new world of AI

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.
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April 9, 2018

ISO 26262 – The Second Edition: what’s in it… and what isn’t

A new version of the automotive safety standard arrives later this year. Review the main updates and see how it will combine with the incoming SOTIF autonomous driving standard.
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December 22, 2017

Improve custom/AMS design and productivity with in-design DRC

In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.
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November 24, 2017
John Ferguson is the Director of Marketing for Calibre DRC Applications at Mentor, a Siemens Business, in Wilsonville, Oregon, with extensive experience in physical design verification. He holds a BS degree in Physics from McGill University, an MS in Applied Physics from the University of Massachusetts, and a PhD in Electrical Engineering from the Oregon Graduate Institute of Science and Technology.

Assessing the true cost of node transitions

John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.

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