January 11, 2016
Using triple modular redundancy, error detection and correction, and 'safe' FSMs to ensure greater functional safety in FPGA-based designs
January 11, 2016
Dr Walden Rhines, Mentor Graphics chairman and CEO, looks forward to the trends that will shape 2016 in the semiconductor industry.
January 4, 2016
The 10nm process node calls for the use of SOCV techniques during timing signoff to avoid leaving too much performance on the table.
November 26, 2015
The arrival of the 10nm process will impact the way that designers approach custom and mixed-signal layout. Cadence Design Systems has made changes to its Virtuoso environment that deploy increased automation support and electrically-aware layout to deal with the upcoming issues.
October 29, 2015
The 10nm process will see changes to multiple patterning that demands changes in the implementation flow, along with an increased focus on the effects of variability.
October 21, 2015
Part three of our series looks at the choices you face as you decide whether to build or buy a board.
September 28, 2015
Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
September 23, 2015
AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
September 7, 2015
This multi-part series addresses various aspects of FPGA-based prototyping. Future installments will address budgeting and implementation, but we start by looking at why the technique is generating so much interest.
August 24, 2015
The wearables market is booming. Successful development depends on assembling the right software and hardware tools. Here's a primer on what to look for.