Blog Topics

May 19 is the deadline for 'I Love DAC' offering free access to exhibits and many events, panels and speeches at the 2015 Design Automation Conference.

ARM CTO Mike Muller called for IP to be used throughout the IoT as part of a strategy for secure systems at a recent NMI seminar at Bletchley Park, England.

Altera is revamping the Quartus II software for its FPGAs with a mapping and synthesis engine aimed at the upcoming Gen 10 products, as well as adding a C/C++ front-end for system-level design.

Intel 14nm finFET SoC process is among the highlights of the 2015 VLSI Symposia alongside research that looks at the integration of III-V and 2D materials for future processes.

Benchmarking organization EEMBC has kicked off an effort to develop a set of performance tests for edge nodes for the Internet of Things (IoT).

Online and physical conference focuses on achieving compliance with safety standards such as ISO26262, DO254, and DO178

Cabling and its weight are helping to drive integration and a shift towards wireless communication within cars, says NXP's automotive CTO.

Cadence Design Systems has launched a debug tool designed to improve the speed of bug hunting in SystemVerilog but which the company expects to grow into analog and post-silicon work.

Mentor Graphics is working on technology to analyse the effects of mechanical stress on integrated circuits, describing progress at the company's U2U conference.

UltraSoC has added the ability to employ a USB 2.0 port instead of JTAG as the main debug access point on SoCs that use the company’s UltraDebug technology.