Benchmarking the maturity of AI in EDA
Solido discusses how it has leveraged AI for SPICE level efficiency and the benchmarks it has used.
Archives
Arm gives Helium to low-end Cortex-M core
Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
ETRI builds flow for AI chiplets
South Korea's leading research institute has built a reusable flow for lower power petaflops-performance AI.
Siemens takes automotive digital twin to the AWS cloud
Siemens has made its PAVE360 automotive digital-twin software available on AWS, with the ability to access fast Arm models on the same cloud.
Siemens buys Insight for reliability addition to Calibre
Siemens has completed the acquisition of Insight EDA, a specialist in circuit-reliability analysis.
Imec makes virtual fab public for green analysis
Imec has a version of its imec.netzero virtual fab tool accessible to the general public with the aim of showing the environmental impact of IC manufacturing.
Cadence combines ML techniques for power signoff
Cadence has linked several machine-learning approaches to build a tool that is designed to speed up the detection and diagnosis of on-chip power-integrity issues.
Codasip pips Arm to commercial CHERI with RISC-V version
Codasip has put support for a set of instruction extensions intended to secure memory into its RISC-V core designs.
X-Fab adds galvanic isolation to CMOS process
X-Fab has made it possible to put galvanic isolation based on capacitive coupling directly into chips made on its XA035 process.
Companies partner for embeddable ReRAM
SureCore and Intrinsic have teamed up to provide a way to implement resistive random-access memory as an SoC-embeddable technology.