mixed signal

January 18, 2017

Wafer expansion hits the buffers

What's old is new: 200mm wafers are returning and driving shortages while 450mm fades into the distance.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: ,
November 11, 2016

Webinar focuses on Eldo RF verification of Tanner-based designs

On-demand seminar explains how to exploit recently announced integration of Tanner and Eldo suites for sensor, IoT and other design types.
Article  |  Topics: Blog - EDA, - Product, Verification  |  Tags: , , , , , , ,   |  Organizations: ,
October 9, 2013

Silicon Labs opts for security on M0+ low-power MCUs

Silicon Labs is aiming at Internet of Things applications with an ARM Cortex M0+-based MCU family with encryption engine and low-energy DAC for biasing analog circuitry.
Article  |  Topics: Blog - Embedded  |  Tags: , , , , ,   |  Organizations:
October 2, 2013

Old problems on a new scale

For the new web TV program Unhinged, Brian Fuller talked to venture capitalist Jim Hogan about the future of mixed-signal and the past of EDA.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , ,   |  Organizations:
March 20, 2013

Accellera publishes SystemC-AMS 2.0 standard

Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.
Article  |  Topics: Blog - EDA  |  Tags: , , ,
March 7, 2013

Tanner embraces OpenAccess

Tanner EDA has completed the port of its HiPer Silicon design suite to work with the OpenAccess database, providing better interoperability with foundry process design kits (PDKs) and with other vendors’ IC design tools as well as providing better support for multiple users accessing the same design.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
December 4, 2012

IPSoC: 20nm causes analog ‘density fill headaches’

20nm design is fraught with problems for analog design but one that causes the biggest headaches is density variation, says Synopsys' Joachim Kunkel.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
September 26, 2012

Cadence updates Allegro and Orcad

Cadence Design Systems has updated both of its printed circuit board (PCB) tools – Allegro and Orcad – to improve their handling of design constraints, multiuser design and deal with embedded components and mechanical CAD tools.
June 1, 2012

DAC 2012: STMicro, Cadence, GlobalFoundries in 20nm AMS claims

The troops will be out in force next week to claim progress on 20nm AMS design flows that take manufacturability into account.
May 15, 2012

Analog designers ‘need to use digital tools’

Designers working on mixed-signal circuits will benefit from using digital tools, Cadence's SVP of R&D for custom design said at CDNLive EMEA today. But for those who don't a faster fast Spice is on its way.

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