Embedded software engineers need to focus on power optimization in their code much earlier and more comprehensively than many of them do today, says Mentor Graphics technologist Colin Walls.
Traditional IP reuse is giving way to configurable, customized cores delivered by semi-automated "IP factory" groups.
20nm design is fraught with problems for analog design but one that causes the biggest headaches is density variation, says Synopsys' Joachim Kunkel.
Tabula expects to have 22nm FPGAs next year and is trying to recruit IP developers to an 'app store' for data-center hardware.
View All Sponsors