October 24, 2016
At the 62nd annual IEDM taking place in early December two of the leading groups in process development will take the wraps off their 7nm finFET technologies.
October 17, 2016
Ahead of a tutorial on the technique at DVCon Europe with other EDA experts, Breker's Adnan Hamid talks about the need for portable stimulus in verification.
October 14, 2016
Catch up with the vendor's plans for the ARM technical conference in Santa Clara later this month.
October 13, 2016
Electronic System Design Alliance executive director Bob Smith is to be be the keynote speaker during the DVCon Europe gala dinner.
October 11, 2016
Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.
October 10, 2016
Ceva has decided to take its VLIW architecture into the world of IoT sensor nodes and smart wearables with the launch of the X1 processor core.
October 10, 2016
Cadence Design Systems has released a set of ten verification IP packages intended to support a new crop of standard protocols.
September 27, 2016
Ceva has launched the fifth generation of its vision-oriented DSP core family with an architecture tuned for the fast-growing area of convolutional neural networks and deep learning.
September 20, 2016
UltraSoC plans to support the RISC-V open-source instruction architecture with its debug infrastructure and tools.
September 20, 2016
ARM has launched the first of its Cortex-R series of processors to be based on the v8R architecture, providing greater protection for software tasks from each other.